This invention relates to a silicon single crystal wafer and a manufacturing process therefor, and particularly, to a silicon single crystal wafer capable of suppressing growth of slip dislocations easily generated in a heat treatment step and a manufacturing process therefor.
An integrated circuit such as LSI has been fabricated mainly starting with a silicon single crystal wafer prepared by means of a pulling method called Czochralski method (CZ method) through many production steps. As one of the production steps, there exists a heat treatment step. There is very important the heat treatment step where, for example, oxide film formation on a wafer surface, impurity diffusion, formation of a defect free layer and a gettering layer and others are performed.
There are known two types of furnaces, vertical and horizontal, as a so-called batch type resistance heating heat treatment furnace which is used in the heat treatment step, and capable of heat treating many wafers at one time. The horizontal furnace is to heat treat wafers which are vertically placed on a jig called a boat for holding them and inserted into the interior thereof. The vertical furnace is to heat treat wafers which are horizontally placed on a boat and inserted into the interior thereof.
One of problems in the heat treatment step is generation of slip dislocations. A slip dislocation means a defect having a stepwise profile created on a wafer surface by slip deformation in crystal due to a thermal stress during the heat treatment step. When such slip dislocations generate on a wafer surface, not only a mechanical strength is reduced, but device characteristics such as junction leakage are adversely affected; therefore, it is desired to reduce slip dislocations to the lowest possible level.
When heat treatment is conducted using the batch type heat treatment furnace as described above, temperature distribution is generated in a wafer during loading it into and unloading it from the furnace or during raising or lowering a furnace temperature, which causes a stress in the wafer due to the temperature distribution. Further, when this stress exceeds a critical value, a slip dislocation generates. In this case, since a wafer is placed on a boat, the wafer weight is apt to be concentrated at a contact portion with the boat, which causes a bigger stress acting on the contact portion and easier generation of slip dislocations. Especially, when a wafer is of a larger diameter, the wafer weight becomes bigger and influences greatly.
On the other hand, there is also a case where, in the heat treatment step, an RTA (Rapid Thermal Annealing) apparatus is employed, which is a single wafer heat treatment furnace using lamp heating or the like, in addition to the above described batch type heat treatment furnace. In the case of an apparatus of this kind, since the furnace is a single wafer processing type and a temperature up and down rate is very fast and temperature distribution in a wafer is harder to occur compared with the batch type heat treatment furnace, the furnace is useful in heat treatment of a large diameter wafer, but there is a phenomenon that slip dislocations are easy to occur at a contact portion with a jig on which wafers are placed because a stress due to the wafer weight is concentrated to the contact portion, which is similar to the case of the batch type heat treatment furnace.
In order to suppress slip dislocations generated in such a way, remedies have been mainly studied from two viewpoints in the prior art. An approach from one viewpoint is to reduce a stress imposed on a contact portion between a wafer and a boat, wherein the concentration of a stress is alleviated by improving a shape of the boat. For example, a technique disclosed in JP-A-97-251961 is such that an angle of the wafer placing portion of the boat for a vertical furnace heat treatment is held is set so as to be in conformity with deformation thereof caused by the wafer weight, and thereby a contact portion between the wafer and the boat is altered from a condition of a point contact to a plane contact, with the result that concentration of a stress is prevented.
Another approach is to reduce temperature distribution in a wafer generated in a heat treatment step by improving a heating condition. For example, a technique disclosed in JP-A-95-235507 is such that hydrogen or helium having higher thermal conductivity than nitrogen or argon which is usually used during raising and lowering temperature in a heat treatment step is employed to encourage thermal conduction to a wafer so as to reduce a temperature difference in a wafer surface. Also, a proposal has been made in JP-A-95-312351 that generation of slip dislocations is prevented by reducing a temperature rise/fall rate with a rise in temperature.
As approaches from the two viewpoints, not limited to the above described examples, many others are known. While all the above described approaches have some level of effectiveness for suppressing slip dislocations in a heat treatment step, they are not necessarily perfect as remedies for all of a variety of heat treatment steps and furthermore, some of them are not practical in cost problems.
On the other hand, in addition to approaches from the above described two viewpoints to suppress generation of slip dislocations, one attempt has been tried very recently in which characteristics of a wafer itself are improved to make slip resistance better. For example, in JP-A-97-227290 there is proposed a wafer in which an oxygen concentration in the peripheral region is not less than 95% of that in the middle on the basis of observation that a silicon single crystal wafer prepared from a single crystal rod grown by means of a CZ method has a lower oxygen concentration in the peripheral region than in the middle, which is a cause for generation of slip dislocations. A manufacturing process for such a wafer is disclosed in the publication in which a single crystal rod of a diameter larger than that of a product wafer by 10 mm or more is pulled and the single crystal is ground off to a target diameter.
Further, description is found in JP-A-97-190954 that in a CZ wafer of a low oxygen concentration generation of slip dislocations is suppressed when polyhedral oxide precipitates are formed at a prescribed density in a region with a width of 10 mm or less from the periphery where slip dislocations are generated with ease.
Furthermore, in order to generate the oxide precipitates at the prescribed density, the publication discloses a technique in which oxygen is ion-implanted in the region with a width of 10 mm or less from the periphery, and two stage heat treatment is carried out in a nitrogen atmosphere.
However, since the techniques described above are to improve characteristics of a wafer itself, an effect may be obtained in all the heat treatment steps, but any of them lacks practical use due to insufficient simplicity and cost performance. That is, in the technique disclosed in JP-A-97-227290, a loss of a silicon single crystal rod increases and further an extra time required for processing becomes necessary, and in JP-A-97-190954, additional steps of ion implantation and two stage heat treatment are required.
The invention has been made in light of the above described problems and it is accordingly an object of the invention to provide a CZ silicon single crystal wafer to be subjected to a heat treatment step which has improved slip resistance of a portion in contact with a heat treatment boat by using a manufacturing process with extreme simplicity, convenience, and very low cost.
In order to achieve the object, a silicon single crystal wafer of the invention is a wafer prepared by means of a Czochralski method, and characterized in that when the silicon single crystal wafer is placed on a boat for heat treatment, at least a portion of the silicon single crystal wafer in contact with the boat is formed of an OSF ring region. When a silicon single crystal wafer has a portion formed of the OSF ring region in contact with the boat, growth of a slip dislocation is confined within the interior (the bulk portion) of the wafer, if the slip dislocation generates at the contact portion; therefore, no slip dislocation extends to the wafer surface and no influence is exerted on a device region in the surface side of the wafer.
Furthermore, the OSF ring region is preferably an annular region with a width of 10 mm or less from a periphery of a silicon single crystal wafer. This is because if the OSF ring region expands inward up to a distance more than 10 mm from the periphery, a useful area in which characteristically excellent devices can be fabricated is reduced, leading to a case where a sufficient number of product devices cannot be ensured. In case of a vertical furnace, since the contact portion between the wafer and the boat is located at about 8 mm at most from the periphery of the wafer, the OSF ring located at about 10 mm from the periphery is effective for suppressing growth of the slip dislocation. On the other hand, in case of a horizontal furnace, since the contact portion between the wafer and the boat is at about 3 mm at most from the periphery, the OSF ring located even at about 5 mm from the periphery is still effective for suppressing growth of the slip dislocation.
Moreover, a nitrogen concentration in a silicon single crystal wafer is preferably in the range of 1xc3x971010 to 5xc3x971015/cm3. A wafer including nitrogen in such a content is more effective for suppressing growth of slip dislocations since sizes of oxide precipitates decrease and a density thereof increases due to effects of nitrogen.
Also, a nitrogen concentration is desirably 1xc3x971010/cm3 or more in order to increase a density of oxide precipitates, and preferably 5xc3x971015/cm3 or less in order not to hinder crystallization of a silicon single crystal, but more preferably in the range of 1xc3x971012 to 1xc3x971015/cm3 in terms of suppression of slip dislocations.
In order to produce such a silicon single crystal wafer, a manufacturing process for a silicon single crystal wafer of the invention is characterized in that a silicon single crystal rod is grown by means of a Czochralski method in a condition that an OSF ring region is formed in a peripheral region of the silicon single crystal rod and the silicon signal crystal rod obtained is sliced into silicon single crystal wafers.
A detailed pulling condition can be such that when a pulling rate is indicated by F [mm/min] and an average temperature gradient in a pulling direction in a length between points corresponding to a silicon melting point and 1400xc2x0 C. in the crystal is indicated by G [xc2x0 C./mm] by definition, there is present in a peripheral region of the crystal, an OSF ring region of a defect distribution chart showing defect distribution with an abscissa representing a distance [mm] in a direction to the crystal periphery from the center and an ordinate representing a value of F/G [mm2/xc2x0 C.xc2x7min].
Moreover, when a silicon single crystal rod is grown by means of the Czochralski method, if the silicon single crystal rod is pulled while doping with nitrogen at a concentration in the range of 1xc3x971010 to 5xc3x971015/cm3, a silicon single crystal wafer doped with nitrogen at a concentration in the range of 1xc3x971010 to 5xc3x971015/cm3 can be produced.